Hi Folks,
Among the list of articles we have at hand, our team kept wondering what could be a good first article. As such, we have quite an ambitious list split into 3 streams –
1. Digital design & verification using HVL and HDL
2. OOPs
3. CAD
Each stream has ready blogs that last about a year! Video tutorials in addition to that! Phew! We decided to start with (1) and we chose to detail NET v/s REG datatypes in Verilog to begin with. Beware, all of them are long reads… just need you to be patient here.
Will push the first one soon.
Good day, folks!
Tech Pubs,
Proxelera
